AnalogueAI Labs is developing a patent-pending PWM-based multiply-accumulate IC that performs neural network inference and training entirely in the analogue domain — at a fraction of the energy cost of digital silicon.
The fundamental operation in every neural network — the dot product of weights and activations — is a multiply-accumulate (MAC). In digital systems, this is implemented with binary multipliers and adders: fast, precise, but energetically expensive at scale.
Our approach is different. We encode signed numerical values as pulse-width modulated signals, where the temporal position of a pulse within a clock period encodes both magnitude and sign. Multiplication becomes temporal coincidence — the AND of two PWM signals. Accumulation becomes charge integration on a capacitor.
A rising ramp generates positive values; a falling ramp generates negative values. Both ramps cross VCC/2 at precisely T/2, making opposite-sign signals temporally orthogonal — their AND product is identically zero with no additional logic. An H-bridge accumulator routes same-sign products onto a single integration capacitor with correct polarity, governed by a single XOR gate on two sign latches.
On-chip backpropagation is supported by storing the post-activation output x and recovering the activation derivative σ′(z) = α − x²/α algebraically — without separate storage of pre-activation values.
We are actively seeking strategic investment and research partnerships to advance the Sky130 tapeout and develop the first production array. If you are an investor, foundry partner, or research institution working in edge AI, neuromorphic computing, or low-power inference, we would like to hear from you.